Jianze's Blog

Feel the beauty of circuits

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一些准备工作

参考

联网(重要)

这一小节接上一篇教程。接下来的所有操作都已默认你已经安装好了Arch Linux,如果你还没有安装,可以参考上一篇教程进行安装。

当我们开机后会进入到下图中的界面,一个纯命令行交互界面。如果你不需要一个图形化界面,那么只需要把接下来联网的步骤做完,你的系统就已经准备好了。

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因为在之前的安装过程中,我们并没有创建新的用户,只是创建了root的密码,所以登录时只能以root身份登录系统。这时如果直接输入pacman -Syyu的话,系统会报错因为我们没有连接到互联网。为了让系统连接到网络,需要每次开机都输入一次dhcpcd &,这样很麻烦而且效率很低。所以为了让每次开机时系统自动连接到网络,我们需要按照以下步骤来让系统每次开机时自动运行dhcpcd

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ip link show

输入上面的命令后,我们可以看到我们系统的网络接口名称,我的如下图所示,接口名称为ens33

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接下来,我们创建一个名为dhcpcd@ens33的服务,并在每次开机时自动启动这个服务,输入以下命令:

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systemctl enable dhcpcd@ens33.service

注意,将上面的ens33替换成你自己的接口名称。这时如果重启系统的话,利用ping www.baidu.com来查看,我们就会看到此时系统已经连到网络了。不想重启的话,可以输入下面的命令启动这一服务:

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systemctl start dhcpcd@ens33.service

这时再输入pacman -Syyu,系统就可以正常安装其他包和更新了。

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创建低权限用户

创建较低权限用户的原因是root权限过高,对于不太熟悉Linux系统的用户,在输入一些对系统有较大改动的命令时,很容易出现误操作,比如rm -rf /。使用较低权限用户可以有效避免这些问题。首先安装一下必要的工具:

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pacman -S base-devel

使用useradd添加一个新的用户:

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useradd jay -m -G wheel

其中-m是为用户创建home目录,-G是把用户添加进组,上面的命令是将用户jay添加进名为wheel组。但此时这个用户还没有权限对系统作出改动。我们需要编辑/etc/sudoers.tmp文件。这里我用vim进行编辑。找到# %wheel ALL=(ALL) ALL这一行,删掉前面的#,保存并退出。

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这时我们从root用户退出,已创建的新用户登录,输入sudo pacman -Syyu,我们就会看到这个新的用于再输入密码后也可以对系统作出改动了。

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安装KDE-Plasma

安装display server

主流的display server有两个,一个是Xorg(X11),另一个时Wayland。Wayland的主要目标时成为Xorg的继任者。可以根据个人需求安装。本篇使用Xorg。

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sudo pacman -S xorg

安装plasma-desktop以及sddm

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sudo pacman -S plasma

注意,此命令其实只安装了plasma-desktop,一些常用的KDE应用并没有被安装。

sddm是一个display manager。通常被用于系统的login,例如下图:

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输入下面的命令安装sddm

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sudo pacman -S sddm

dhcpcd一样,此时sddm并不会在下次开机时自动运行,所以,类似dhcpcd,我们也要创建一个名为sddm.service的服务并告知系统我们需要在每次开机时自动运行这个服务。

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sudo systemctl enable sddm.service

安装kde-applications

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sudo pacman -S kde-applications

输入这个命令后,我们可以看到以下输出:

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可以看到,pacman给出了所有会安装的包,如果你不像我一样只想要一个小一些的系统的话,就可以直接默认全选了。因为是在笔记本上新建的虚拟机,我没有给Arch分配很大的空间。所以我这里只选了几个必须的包:

  • (13 & 14) dolphin:kde的文件管理器
  • (21) gwenview:kde的图片查看器
  • (106) konsole:kde的终端模拟器
  • (142) okular:kde的PDF阅读器
    注:因为版本更新,在安装时软件包的编号可能会变化,输入你想安装的包的编号就好。

当然,还差一个浏览器:

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sudo pacman -S firefox

注:google-chrome不在Arch Linux的官方库中,AUR中有相关的包,可以参考官方文档进行安装。

以上步骤做好后,重启系统,我们就有一个KDE桌面的Arch Linux了。

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后记

本教程只是引导安装了KDE-plasma桌面,Arch Linux还有其他有意思的桌面,比如Gnome和XFCE。如果有兴趣的话,也可以尝试一些tiling windows manager,比如dwmi3等。

我在自己的GitHub上放出了自己Qtile的配置,如果有兴趣也可以尝试一下

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虽然废了很多力气写这两篇文档,但实际上我并没有把Arch Linux作为我常用的工作系统,处于工作的需要,我依然需要Windows和Ubuntu。Arch Linux也因为是滚动更新所以并不稳定,所以我并不推荐新手把Arch用作工作系统。但也正因为如此,在使用Arch的过程中会需要解决问题,我对于Linux的理解也更加的深入了。

如果这两篇教程有帮助到你,我会非常开心。一起继续保持学习吧。

reference

HSPICE - Introduction

SPICE is a general purpose analog circuit simulator that is used to verify circuit designs and to predict circuit behavior. This is of particular importance for “integrated circuits”. It was for this reason that SPICE was originally developed at the Electronics Research Laboratory of the University of California, Berkeley (1975), as its name implies:

Simlulation Program for Integrated Circuit Emphasis

HSPICE is a commercial and very powerful version of SPICE that has fewer bugs than the freely avaliable Berkeley SPICE. HSPICE is a relatively comprehensive program that can be used to simulate very large circuits comprising many different types of components. HSPICE is able to handle hierarchical circuit structures (i.e., you can define subcircuits) and supports both local and global variables/parameters.

Circuit analyses supported by HSPICE:

  • Non-linear DC analysis: calculates the DC transfer curves from any input to any output.
  • Non-linear transient analysis: calculates the voltages the currents as a function of time when a signal is applied.
  • Linear AC Analysis: calculates the frequency response from the input to all specified node voltages and currents. Bode plots can be generated using a graphical post processor, such as AWAVES.
  • Noise analysis
  • Sensitivity analysis
  • Distortion analysis
  • Fourier analysis: calculates and plots the frequency spectrum
  • Monte Carlo Analysis

Components supported by HSPICE:

  • Independent and dependent voltage and current sources
  • Resistors
  • Capacitors
  • Inductors
  • Mutual Inductors
  • Transmission Lines
  • Operational Amplifiers
  • Switches
  • Diodes
  • Bipolar Transistors
  • MOSFET Transistors
  • MESFET Transistors
  • JFET Transistors
  • etc.

HSPICE - Files

HSPICE Input Files

  • source (nelist): filename.sp
  • design configuration: filename.cfg
  • initialization: hspice.ini

HSPICE Output Files

  • run status: filename.st0
  • output listing: filename.lis
  • graph data, transient: filename.tr# (.tr0)
  • graph data, dc: filename.sw# (.sw0)
  • graph data, ac: filename.ac# (.ac0)
  • measure output: filename.m*# (.mt0)

Source file (.sp)

The source file is your input file. This file contains your circuits description and all options and analysis you wish HSPICE to deal with. The structure looks like this:

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title					- Implicit first line, must be there
.options - set conditions for simulation
ANALYSIS and TEMP - statements to sweep variables
.print/.plot/Analysis - set print, plot, and analysis variables
.initial conditions - input state of system
netlist - circuit descriptions (components, input sources)
.model libraries - .lib and .inc
.end - terminates the simulation (always add a newline character)

Design configuration (.cfg)

Configuration files are used by HSPICE, AWAVES and HSPLOT to describe the available terminals and hardcopy devices.

Initialization (hspice.ini)

The initialization file deals primarily with setting up HSPICE itself and has no need to be modified by users.

Run status (.st0)

The run status file is a transcript of what operations HSPICE performs on a source file. The file sometimes offers help when debugging as shows steps not preformed by HSPICE.

Output listing - important (.lis)

This is one of the most important files in HSPICE as this file lists all results obtained from simulation. This file contains (in order of listing in the file):

  1. HSPICE licensing info
  2. Listing of the circuit
  3. Results from the analysis of the circuit (.op, .print, .plot, .measure, .ac, and .tran in order of their appearance in the source file)

Graph data files (.tr#, .sw#, .ac#)

Graph date files are created by .OPTION POST command and contain the date to graphed by HSPLOT, AWAVES, HSPICE. Basically these files retain the data to be graphed from the .lis file in a different graphing format.

Measure output (.m*#)

The measure output file hold the result from .MEASURE commands. These files are not very useful because the data is hard to read and already exits in a nicely formatted way in the .lis file.

HSPICE - Source File

The HSPICE source file consists of five parts.

  • Title statement: the first line is the circuits title; it may be anything, but not neglected.
  • Data statements: description of the components and the interconnections.
  • Control statements: tells SPICE what type of analysis to perform on the circuit.
  • Output statements: specifies what outputs are to be printed or plotted.
  • End statement: on the very last line: .END followed by a carriage return.
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TITLE STATEMENT
ELEMENT STATEMENTS
.
.
COMMAND (CONTROL) STATEMENTS
OUTPUT STATEMENTS
.END

Comment statements: can be anywhere in the source file:

  • ‘*‘ - indicates a full line comment
  • ‘$’ - indicates and end-of-line comment

Continuation: ‘+’ - indicates a continuation of the previous line.

NOTATION

HSPICE notation is relatively simple. Both upper and lower case letters are allowed, but no distinction is made (HSPICE converts everything to upper-case characters before any interpretation is attempted).

The statements have a free format and consist of fields separated by a blank. Each line is interpreted as a separate statement.

  1. All statements begining with a ‘.’ are commands (.OPTION, .PRINT, .AC, etc.)
  2. Statements that begin with an alphabetic character are treated as elements, the first character determines the type of element:
    • R for resistors
    • C for capacitors
    • L for inductors:
    • D for diodes
    • Q for bipolar junction transistors
    • M for MOS transistors
    • V for voltage sources
    • I for current sources
    • G for voltage-controlled current sources (tranconductance amplifiers)
    • F for current-controlled current sources (current amplifiers)
    • E for voltage controlled voltage sources (voltage amplifiers)
    • H for current-controlled voltage sources (tranresistance amplifiers)
    • X for subcircuits (hierarchical circuit structure)

Topology Rules

  • Every node must have a DC path to ground.
  • No dangling nodes (all nodes must have at least two connections).
  • No loops of only ideal voltage sources and capacitors.
  • No nodes connected to only ideal current sources and inductors.

Naming conventions

  • Node Identification:
    • 0 is ALWAYS ground
    • It’s best to start all node names (besides ground) with an alphabetic character.

HSICE units

  • f=1e-15
  • p=1e-12
  • n=1e-9
  • u=1e-6
  • m=1e-3
  • k=1e3
  • meg=x=1e6
  • g=1e9
  • t=1e12

Global Variables

  • Syntax
    • .global node1 node2 node3 : globally defined nodes
    • .global vbias vcc : globally defined sources
  • Usage
    • when subcircuits are included in the data file
    • assign common node name to subsircuit nodes
    • power supply connection of all subcircuits is often done this way:
      • .global vcc: connects all nodes named vcc (all circuits have a common node)

Essential globals are used most often for subcircuits, though they are great for sources. Notice that ground (node 0) always is a global node.

HSPICE - Devices

General Element Statements

The element statement specifies the type of element or independent source used.
It has a field for the element name, the connecting nodes, a value for the
component, and optional parameters.

General Form:

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NAME node1 node2 ... nodeN <model reference> value <optional parameters>

NAME
Specifies the type and name of element. The first letter in the name field
identifies the element as a specific type, the remaining letters give the element
a unique name.

node
Specifies how the element is connected in the netlist.

value
Gives the values of the element


Refers to the model when the basic element value does not provide an adequate
description.


Used to modify existing values within a .model for this paricular element.
In order to words a .model might have a temperature of 27 degrees when you
what 40 degrees Centigrade.


.model Statements

.model statements allow extra device descriptions are required for accuracy.
For instance, a .model statement can be used to give resistors operating
temperatures, L and W values to MOSFET’s, or even insulator thickness on a
capacitor. .model statements can be included any within the .lis, though
they are usually placed before the netlist for convenience.

General Form:

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.model mname modeltype<keyword=value>

mname
The model reference name specified in the associated element statement.

modeltype
Specifies the model type to be used, i.e., R for a resistro, C for a capacitor,
and L for inductor.


.param Statements

.param statements allow the user to define local variables.
The variables can be defined as values, equations, or even functions.

General Form:

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.param variable = 'expression'
or
.param variable = value

variable
Represents the name of the variable or function to be defined.
expression
Represents the value, equation, or function to be assigned to the variable.


Devices

Passive

Resistors

The resistor elements use the following formats:

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Rxxx n1 n2 Rval
Rxxx n1 n2 <mname> Rval <TC1=val> <TC2=val> <SCALE=val> <m=val>
+<AC=val> <DTEMP=val> <L=val> <W=val> <C=val>
Rxxx n1 n2 R='equation'

AC
AC resistance used in the AC analysis.
default=Reff

C
Capacitance connected from node n2 to bulk.
default=0.0

DTEMP
Element and circuit temperature difference.
default=0.0

equation
The resistor can be described as a function of any node voltage, branch currents
and any independent variables such as TIME, frequency (HERTZ), or temperature
(TEMPER)

L
Resistor length.
default=0.0

M
Multiplier used to simulate parallel resistors.
default=1

mname
Model name.

n1
Positive terminal node name.

n2
Negative terminal node name.

R
Resistance.

Rxxx
resistor element name. Must begin with ‘R’.

SCALE
Element scale factor for resistance and capacitance.
default=1

TC1
1st order Temp. Coeff. for resistor.

TC2
2nd order Temp. Coeff. for resistor.

W
Resistor width.
default=0.0


Capacitors

The capacitor elements use the following formats:

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Cxxx n1 n2 capval
Cxxx n1 n2 <mname> capval <TC1> <TC2> <SCALE=val> <IV=val> <M=val>
+<DETMP=val> <L=val> <W=val>
Cxxx n1 n2 <mname> C=val <TC1=val> <TC2=val> <SCALE=val> <M=val>
+<DTEMP=val> <L=val> <W=val>
Cxxx n1 n2 C='equation' CTYPE=0 or 1

Cxxx
Capacitor element name. Must begin with an ‘C’.

C
Capacitance in farads at room temperature.

CTYPE
For capacitance, if C is a function of v(n1,n2),then CTYPE=0 else =1.
The capacitance charge is calculated differently depending on the value of
CTYPE.

IV
Initial voltage across the capacitor in volts.

The rest can refer to resistor which the definitions are the same.

Note: Inductor is skipped since I don’t use it in my design.


Active

Diodes

Diodes in HSPICE can be anywhere from very complex realistic diodes to simple
ideal ones depending on the circuit designer. In general all diodes will have a
model name and be defined by a .model statement. Since most models are
provided, .model descriptions will not be given in any detail.
The diode element uses the following formats:

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Dxxx nplus nminus mname <options>
Dxxx nplus nminus mname <AREA=val> <PJ=val> <WP=val> <LP=val> <WM=val>
+<LM=val> <OFF> <IC=vd> <M=val> <DTEMP=val>
Dxxx nplus nminus mname <AREA=val> <L=val> <WP=val> <LP=val> <WM=val>
+<LM=val> <OFF> <IC=vd> <M=val> <DTEMP=val>

AREA
Represents the area of the diode.
default=1

Dxxx
Diode element name, must begin with an ‘D’.

nplus
Positive terminal name (arrow end) of the diode.

nminus
Negative terminal name (line end) of the diode.

PJ
Periphery of junction.

WP
Polysilicon capacitor width (in meters).

LP
Polysilicon capacitor length (in meters).

WM
Metal capacitor width (in meters).

LM
Metal capacitor length (in meters).

OFF
Sets the diode initially to the off operation region (DC analysis).
default=ON

IC
Initial diode voltage.

The rest options can be refer to resistor.

BJT is skipped.


MOSFETS

MOSFETs are another device within HSPICE that requires a .model statement.
The .model statement is required to define whether or not the circuit designer
want to deal with a p- or n-channel device. The syntax for the .model statement
is shown below:

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.model mname NMOS <or PMOS> <parameters>

Only the model name and the NMOS (or PMOS) are required. The MOSFET transistor element uses the following formats:

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Mxxx nd ng ns mname
Mxxx nd ng ns <nb> mname <L=val> <W=val> <AD=val> <AS=val> <PD=val>
+<PS=val> <NRD=val> <NRS=val> <RDC=val> <RSC=val> <OFF>
+<IC=vds,vgs,vbs> <M=val> <DTEMP=val> <GEO=val> <DELVTO=val>
Mxxx nd ng ns <nb> mname lval wval ...

nd
Node name for drain terminal.

nd
Node name for gate terminal.

ns
Node name for source terminal.

nb
Node name for the bulk terminal.

AD
Diffusion area of the drain.

AS
Diffusion area of the source.

PD
Drain junction perimeter (including channel edge).
default=0

PS
Source junction perimeter (including channel edge).
default=0

NRD
Number of resistance squares of drain diffusion.
default=0

NRS
Number of resistance squares of source diffusion.
default=0

RDC
Contact resistance on the drain.
default=0

RSC
Contact resistance on the source.
default=0

OFF
Sets the transistor initially to the off operation region (DC analysis).
default=ON

vbs,vds,vgs

  • vbs: initial bulk-source voltage
  • vds: initial drain-source voltage
  • vgs: initial gate-source voltage

DELVTO
Zero-bias threshold voltage shift.
default=0

GEO
Source-drain sharing selector (only use for ACM=3 in .model).
default=0


Independent sources

General Form

In general, voltage and current sources in HSPICE can be very almost anything
from simple dc sources to incredibly complex piecewise linear ones. The general
form for both current and voltage sources are shown below:

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* Voltage
Vxxx n+ n- <DC=>dcval
Vxxx n+ n- <AC=>acmag, acphase
Vxxx n+ n- tranfun
* Current
Ixxx n+ n- <DC=>dcval
Ixxx n+ n- <AC=>acmag, acphase
Ixxx n+ n- tranfun

tranfun
Transient source function (i.e. PULSE, PU, SIN, EXP, PWL, PL).


Pulse Function

The pulse function can create either a linear rectangular or linear trapazoidal
pulse with an initial time delay. The function also has user defined rise, fall,
and high times. The functions are placed in the tranfun position listed above.
The pulse function has the form:

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PULSE (v1 v2 <td> <tr> <tf> <pw> <per>)
PU (v1 v2 <td> <tr> <tf> <pw> <per>)

v1
Initial value of voltage or current before the pulse.

v2
Pulse current or voltage value.

td
Time delay for the start of the transient interval to the up ramp.
default=0

tr
Rise time.
default=TSTEP

tf
Fall time.
default=TSTEP

pw
Pulse width.
default=TSTEP

per
Pulse repetition period in seconds.
default=TSTEP (transient timestep)


Sin Function

The HSPICE sin function can produce a sin wave input with user defined delay,
magnitude and phase. Also, HSPICE can also produce exponentially damped sin
sources.

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sin (vo va freq td damp<pd>)

vo
Wave offset.

va
wave amplitude.

freq
Wave frequency in Hz.
default=1/TSTOP

td
Wave time delay in seconds.
default=0

damp
Wave damping factor in 1/seconds.
default=0

pd
Phase delay in degrees (not radians).
default=0


Exponential Function

The exp function produces an exponential with user definable rise time and fall
time constants and delay values.

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exp (v1 v2 <td1> <t1> <td2> <t2>)

v1
Starting voltage or current.

v2
Pulse value of voltage or current.

td1
Rise delay time in seconds.
default=0

t1
Rise time constant in seconds.
default=TSTEP

td2
Fall delay time in seconds.
default=td1+TSTEP

t2
Fall time constant in seconds.
default=TSTEP


Piecewise Linear Function

The HSPICE piecewise linear function is a collection of user defined pulses and
steps. All plateaus and rise and fall times are also user definable. In addition,
when moving between differing voltages or currents, the function will always
proceed linearly.

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PWL (v1 t1, <v2 t2, v3 t3, ...> <R=<repeat>> <TD=delay>)

R
Forces the function to repeat.

repeat
The start time for the function to repeat in seconds.

t1…
The time value in seconds.

TD
Keyword for the function time delay.

delay
Actual time delay in seconds.

v1…
Current or voltage values.

Note: each voltage and time come in pairs.

HSPICE - Commands

Commands or Control Statements to Specify the Type of Analysis

.op Statement

This statement instructs SPICE to compute the DC operating points:

  • voltage at the nodes
  • current in each voltage source
  • operating point for each element

In HSPICE it is usually not necessary to specify .op as it gives you
automatically the DC node voltages. However, HSPICE does not give the DC voltages
unless you have specified a certain analysis type, such as for instance .tran
or .ac analysis (SPICE automatically does a DC analysis before doing a
transient or AC analysis). Thus, if you are only interested in the DC voltages in
HSPICE, you should specify the .op option, or the .dc option.

.dc Statement

This statement allows you to increment (sweep) an independent source over a
certain range with a specified step. The format is as follows:

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.dc SRCname START STOP STEP

in which SRCname is the name of the source you want to vary; START and STOP
are the starting and ending value, respectively; and STEP is the size of the
increment.

.tf Statement

The .tf statement instructs HSPICE to calculate the following small signal
characteristics:

  1. the ratio of output variable to input variable (gain or transfer gain)
  2. the resistance with respect to the input source
  3. the resistance with respect to the output terminals

.tf outvar insrc in which outvar is the name of the output variable and
insrc is the input source.

.sens Statement

This instructs HSPICE to calculate the DC small-signal sensitivities of each
specified output variable with respect to every circuit parameter.

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.sens variable
```
## `.tran` Statement

This statement specifies the time interval over which the transient analysis
takes place, and the time increments. The format is as follows:

.tran TSTEP TSTOP <TSTART >

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- `TSTEP` is the printing increment.
- `STEOP` is the final time.
- `TSTART` is the starting time (if omitted. TSTART is assumed to be zero)
- `TMAX` is the maximum step size.
- `UIC` stands for Use Initial Condition and instructs HSPICE not to do the
quiescent operating point before begining the transient analysis. If UIC is specified, HSPICE will use the initial conditions specified in the element statements.

## `.ic` Statement

This statement provides an alternative way to specify initial conditions of nodes
(and thus over capacitors).

.ic Vnode1 = value Vnode2 = value

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## `.ac` Statement

This statement is used to specify the frequency (AC) analysis. The format is as
follows:

.ac LIN NP FSTART FSTOP
.ac DEC ND FSTART FSTOP
.ac OCT NO FSTART FSTOP

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in which `LIN` stands for a linear frequency variation, `DEC` and `OCT` for a
decade and octave variation respectively. `NP` stands for the number of points
and `ND` and `NO` for the number of frequeny points per decade and octave.
`FSTART` and `FSTOP` are the start and stopping frequencies in Herz.

## Output Statements

These statements will instruct HSPICE what output to generate. If you do not
specify an output statement, HSPICE will always calculate the DC operating
points. The two type of outputs are the prints and plots. A print is a table of
data points and a plot is a graphical representation. The format is as follows:

.print TYPE OV1 OV2 OV3
.plot TYPE OV1 OV2 OV3

in which `TYPE` specifies the type of analysis to be printed or ploted and can
be:
- DC
- TRAN
- AC

The output variables are OV1, OV2 and can be voltage or currents. Node voltages
and device currents can be specified as magnitude (M), phase (P), real (R) or
imaginary (I) parts by adding the suffix to V or I as follows:
- M: magnitude
- DB: magnitude in dB (deciBells)
- P: phase
- R: real part
- I: imaginary part

# NOTES

1. Know what to expect from the simulation before running it.
2. Simulation is NO substitute for THINKING.

## Other helpful hints
1. You can measure the voltage at any node, or the voltage between any two nodes.
However, you can only measure the current passing through a voltage source. To
measure a current through a branch, insert a dummy voltage source of value 0 in
the branch (like an ammeter) and measure the current through this dummy voltage
source.
2. To extract the data from the `.lis` file, have `.print` statements. Use
`.options ingold` so that the data is in the exponent notation. Just edit the
`.lis` file that you get to have the data suitable for MatLab.

吐槽:因为之前hexo的tags和categories页面无法正常显示,在配置的过程中一不小心把原来的两篇博客都删掉了。尝试了用windows FileRecovery找了回来,确实是找回来了。
只不过,找回来的文件都无法正常打开,虽然名称和后缀都对,但是就是无法正常显示,无论是图片还是文字,都不行。只能重写了。这一篇还好,是我不久前写的,但是另一篇是很久之前写的了。
如果以后还有时间的话,再补回来吧。这回长记性了QAQ

安装前

UEFI 还是 BIOS+MBR ?

如果不确定自己的电脑是EFI启动还是BIOS+MBR,可以先进入安装界面,输入

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ls /sys/firmware/efi/

如果有内容输出的话,就是EFI,反之就是BIOS+MBR

注意:这篇文档只会介绍EFI启动模式下的安装。

VMware下,如果想采用EFI启动,可以按以下步骤:

  • 创建好虚拟机但是不要直接运行;
  • 找到你创建的虚拟机目录下的后缀为*.vmx文件;
  • 用你喜欢的文本编辑器打开,在其中加入:
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    firmware = "efi"
    这样开始虚拟机之后就是EFI启动了。

参考

几句想说的话

如果你真的找到了这篇文档,说明你应该像我一样很喜欢折腾这些东西。如果这篇文档真的帮助到你,我会非常开心也会感到非常荣幸。我的很多知识都来源于开源社区无私的分享者们,我也会努力分享我能够分享的一切,希望你也能将开源社区的精神传递下去,谢谢。


开始

来到启动界面开始安装,进入之后会看到下面的界面:

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如果觉得字体比较小看着不舒服,可以输入以下命令调整字体大小:

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setfont /usr/share/kbd/consolefonts/LatGrkCry-12x22.psfu.gz

所有的console字体都放在/usr/share/kbd/consolefonts/这个文件夹下,你也可以选择其他你想用的字体。

网络设置:

我推荐在安装时插一根网线,方便很多。VMware下就相当于已经为虚拟机插了网线了。如果需要链接Wi-Fi,可以参考以下命令和参考目录下的视频:

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ip link show                        # 查看接口名称
ip link set <xxx> up # xxx 就是上一指令中的接口名称
iwlist <xxx> scan | grep ESSID # 扫描可用的Wi-Fi链接
wpa_passphrase <wifi_name> <passwd> > internet.conf # 替换成你自己的Wi-Fi名称和密码
wps_supplicant -c internet.conf -i <xxx> & # 用上一条指令生成的配置文件链接Wi-Fi。
dhcpcd & # 运行dhcpcd使我们的网络连接生效

现在,我们可以尝试ping一个网址,看看网路是否已经连接好了。

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ping www.archlinux.org

如果有正常的输出,我们的网络就配置好了。注意,一定要有网络连接,我们安装的时候会需要网络。

更新系统时钟:

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timedatectl set-ntp true

如果你有其他的需求,比如更换键盘布局,请参考官方安装文档

分区(重要)

有带有图形界面的分区工具,例如cfdisk,我这里还是用fdisk。首先,我们输入fdisk -l,查看一下我们当前磁盘的名称,如下图所示,我的磁盘名称是/dev/sda

输入fdisk /dev/sda,进入fdisk开始分区。

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如果不熟悉fdisk也没关系,可以输入m查看使用帮助:

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我打算为我的系统分以下四个区:

  • /boot:用来作为启动分区,512M
  • swap:用来作为虚拟内存,2G
  • /:根目录,32G
  • /home:家目录(optional),剩余磁盘空间

下面我就根据以上,开始在这个磁盘上制作分区。

首先输入g将现在的磁盘变为GPT格式:

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之后输入n产生一个新的分区,接着分区编号,可以看到从1到128都可以;再之后输入起始位置(默认就好),之后输入终点位置,输入形式为<+Capacity>,例如+512M或者+2G,一定不要忘记加号。

按照之前我设想的分区,将以上过程重复几遍,如下图所示(我没有按照1234编号,按个人需求配置),这时再输入p查看我们刚刚告诉给fdisk的分区指令:

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可以看到我们分区已经显示出来了,但是这时fdisk还没有将这些分区写入,在我们输入写入指令之前,fdisk不会更改我们的磁盘。现在输入w写入。写入完成后fdisk会自动退出,回到root下。

以下为optional,刚刚已经写入了也没关系:我们也可以在fdisk下更改分区的文件系统,输入t告诉fdisk我们要更改分区的文件系统,这时fdisk会要求我们输入分区的编号,再输入想要改到的文件系统的编号,例如我们更改/dev/sda1EFI file system,输入t,输入分区编号1,再输入文件系统的编号1,我们就把/dev/sda1Linux file system改为了EFI file system

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现在我们可以为我们刚刚写入的分区制作对应的文件系统。在命令行中一次输入以下指令:

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mkfs.fat -F32 /dev/sda1
mkfs.ext4 /dev/sda3
mkfs.ext4 /dev/sda4
mkswap /dev/sda2
swapon /dev/sda2

如果不记得自己的对应分区名称,可以输入fdisk -l查看。输入指令时如下图所示:

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现在我们将/mnt挂载到对应的分区上。输入以下命令:

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mount /dev/sda3 /mnt
mkdir /mnt/boot
mount /dev/sda1 /mnt/boot
mkdir /mnt/home
mount /dev/sda4 /mnt/home

真正的安装

安装脚本Arch Linux官方已经给我们准备好了,输入以下指令:

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pacstrap /mnt base linux linux-firmware

我建议在这一步后面加上其他比较重要的的软件包,例如文本编辑器(vi/vim/nano/emacs),网络配置工具(dhcpcd,wpa_supplicant)等。

其实在这之前会有教程提示说更改源,不过最新的arch linux安装的时候会自动把离你最近的源放到最前,不需要再更改了。

输入以上命令之后,等着安装完成:

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重要配置

  • 首先生成fstab文件
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    genfstab -U /mnt > /mnt/etc/fstab
  • 现在,我们登录进刚刚安装好的系统:
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    arch-chroot /mnt
  • 设置区域和时间
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    ln -sf /usr/share/zoneinfo/Asia/Singapore /etc/localtime
    这里Asia/Singapore可以改成其他的地区,看你自己所在的地理位置。
  • 设置硬件时钟
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    hwclock --systohc --utc
  • 本地化

这里默认你已经在刚刚安装的时候安装好了一个文本编辑器,如果没有,输入pcaman -S <your-favoriate-editor>安装

打开文件/etc/locale.gen

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Editor=<your-favorite-editor> /etc/locale.gen

找到en_US.UTF8 UTF8,去掉这一行注释,保存退出后,输入:

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locale-gen

再用<你喜欢的编辑器>打开/etc/locale.conf,写入:

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LANG=en_US.UTF8

保存并推出。

  • 编辑localhost和hosts

用<你喜欢的编辑器>打开文件/etc/hostname,写入:

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myarch

这里这个hostname写啥都行,我就直接写了myarch。保存并推出。

再用<你喜欢的编辑器>打开文件/etc/hosts,写入:

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127.0.0.1   localhost
::1 localhost
127.0.1.1 myarch.localdomain myarch

这里把myarch换成你自己刚刚在hostname中写入到名称。保存并推出。

  • root密码

在命令行中输入

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passwd

创建你的root密码,千万要记住这个密码。

安装引导(重要)

输入以下指令安装grub和其他必要的软件包:

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pacman -S grub efibootmgr intel-ucode os-prober

注意:如果你在安装双系统的话,再多安装一个ntfs-3g

在进行以下步骤之前,找到文件/etc/default/grub,在其中加入以下,然后保存退出

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GRUB_DISABLE_OS_PROBER=false

创建文件夹/boot/grub,命令行中输入

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mkdir /boot/grub

生产grub配置文件,命令行中输入:

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grub-mkconfig > /boot/grub/grub.cfg

安装grub-efi引导,命令行中输入:

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grub-install --target=x86_64-efi --efi-directory=/boot

如下图所示:

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如果你再安装系统时还没有安装网路工具,现在一定要安装,否则一会安装完成之后重启,arch没有网络连接。需要的工具在之前有提到。

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pacman -S dhcpcd wpa_supplicant

准备重启

重启之前,先退出这个安装好的系统

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exit

然后把之前mount上去的umount掉。

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umount /mnt/boot
umount /mnt/home
umount /mnt

输入reboot重启

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如果出现grub的引导界面:

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恭喜!安装正式完成啦!开始玩耍吧!

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不过可以看到,现在我们是root用户,而且整个系统没有图形界面。下一篇文档我会写安装图形界面的过程以及添加普通用户。

欢迎加入Arch